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Javier Jimenez has a diverse work experience in the field of engineering and design. Javier currently serves as the Director of Engineering & Site Lead at MaxLinear, where they lead a team to develop advanced communication SOCs. Javier focuses on scaling the team to handle complex projects. Previously, they worked as the Director of ASIC Design Engineering at MaxLinear and as a Senior ASIC Design Manager. Prior to their time at MaxLinear, Javier worked as an IC Design Manager at Marvell Semiconductor, where they developed G. hn modems for various communication platforms. Javier managed the entire process from IP development to chip design and implementation. Earlier in their career, Javier held roles as an IC Design Manager and IC Design Engineer at DS2. Javier also served as a Professor at Universidad Politécnica de Valencia.

Javier Jimenez attended Universitat Politècnica de València (UPV) from 1992 to 1998, where they earned a Master of Science (MS) degree in Telecomm.