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Sirisha Nalmela is a Principal Engineer at Marvell Semiconductor since March 2019, with extensive experience in ASIC design and verification. Prior roles include ASIC Engineer 3 at Juniper Networks from February 2012 to February 2019, where Sirisha contributed to the design of high-speed ASICs and developed various verification methodologies. Sirisha has also worked as a Graduate Research Assistant at the University of Pennsylvania, focusing on FPGA component characterization, and held engineering positions at Xilinx Inc. and Mindtree Consulting Ltd., specializing in network processing applications and VLSI design, respectively. Sirisha holds a Master’s degree in Electrical Engineering from the University of Pennsylvania and a Master’s by Research in VLSI and Embedded Systems from IIITH, along with a B.Tech in ICT from Dhirubhai Ambani Institute.