ÂÜÀòÂÒÂ×

Parag Rao is a highly experienced professional in design verification, currently serving in a role focused on Next-Gen CPU design verification at Google since October 2022. Prior to this, Parag worked at AMD as an MTS Verification Engineer, continuing with AI Engine CORE verification after the acquisition of Xilinx. Parag's extensive experience includes key positions at Xilinx as a Senior Verification Engineer, where responsibilities included UVM based functional verification and formal verification of AI Engine DSP and ARRAY verifications. Previous roles also encompass significant contributions at Cypress Semiconductor Corporation, Atmel Corporation, and Arasan Chip Systems Inc., among others. Parag holds a Master¡¯s degree in Electrical Engineering with a focus on Digital VLSI from San Jose State University and a Bachelor¡¯s degree in Electrical and Electronics Engineering from the University of Mumbai.