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Katie Park is a Senior FPGA Engineer at F5 since April 2021, bringing extensive experience in FPGA design and digital systems. Previously, Katie worked as an FPGA Design Engineer at Caldera Development Group, contributing to projects such as a Posit format ALU, Quire-MAC machine learning demo, and various memory controller systems. Earlier roles include Adjunct Professor at Gonzaga University, teaching Digital System Design, and Senior FPGA Logic Design Engineer at Ciena, where responsibilities included designing Carrier Ethernet packet parsers and supporting high-speed data rates. Additionally, Katie worked as an Advanced FPGA & DSP Development Engineer at Agilent Technologies, focusing on cellular network standards. Katie holds a Master of Science and a Bachelor of Science in Computer Engineering from Washington State University.