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Jude Baby George has a decade of experience in IC Design and System Integration. From 2010 to 2017, they worked as a Design Engineer at Broadcom, where they were involved in the system level integration and testing of various blocks in a 4G LTE Modem. Jude then worked as a Design Engineer at Beceem Communications from 2010 to 2011, where they were responsible for the verification of various blocks in MAC hardware, FPGA validation of RF frontend interface blocks, and verifying the interoperability of the baseband chip with the radio. From 2017 to 2019, they worked at Texas Instruments as a Design Engineer, where they were responsible for the architecture, design, and realization of systems for testing next generation high speed ADC's and DACs for front end in 5G mimo systems. Currently, Jude Baby George works at EdgeQ Inc. as a Principal Engineer and Member of Technical Staff, where their roles include RTL Design, data-path implementation of a specialized vector processor extending RISC-V for hardware acceleration, architecture and implementation of schemes for peak power management, and virtual platform architecture for a complex SOC.

Jude Baby George has a comprehensive education history. From 2005 to 2006, they attended Kendriya Vidyalaya and obtained their 12th degree. Jude then attended Kendriya Vidyalaya again from 2004 to 2005 and obtained their 10th degree. From 2006 to 2010, they attended National Institute of Technology Calicut and obtained their Bachelor’s Degree in Electrical and Electronics Engineering. From 2011 to 2013, they attended Indian Institute of Science (IISc) and obtained their ME in Microelectronics. Lastly, from 2013 to 2017, they attended Indian Institute of Science (IISc) again and obtained their Doctor of Philosophy (Ph.D.) in Neuroelectronics and Neuroscience.