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Satish Vangara is a Senior Staff Analog Design Engineer at pSemi, A Murata Company, since March 2018, where previous roles included Staff and Senior Analog Design Engineer. Prior to this, Satish served as a Technical Lead at Knowles Corporation from March 2016 to March 2018, focusing on block-level specifications and power management design for MEMS ASICs. At Texas Instruments, from June 2014 to March 2016, responsibilities included designing power management blocks for audio amplifiers. Earlier experience includes a role as an Analog Design Engineer at Maxim Integrated Products from June 2009 to June 2014, specializing in power management for industrial applications. Satish holds a Master's degree in VLSI from the Indian Institute of Technology, Kharagpur, obtained between 2007 and 2009.