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Pulkit Khandelwal has a diverse work experience spanning over several companies. Pulkit started their career at Oracle Corporation, where they worked on function verification and design of SerDes macros for custom-built CPUs. Pulkit then moved to Texas Instruments, where they specialized in SerDes systems engineering and design verification. Pulkit developed MATLAB models and co-architected designs for various SerDes compliant to industry standards. Later, Pulkit joined Inphi Corporation as a Sr. Principal Engineer, leading the post-si validation and system deployment of PAM-4 based Networking PHYs. Pulkit also led the architecture and development of software stacks for PAM-4 PHYs. Currently, Pulkit is the Head of Systems & Validation at Astera Labs, where they focus on developing purpose-built connectivity solutions to remove performance bottlenecks in compute-intensive workloads like AI and ML.

Pulkit Khandelwal completed their BEng in Electronic Eng. from Cardiff University / Prifysgol Caerdydd from 2000 to 2002. Prior to that, they attended St. Xavier School, though no specific degree or field of study is mentioned for this period.