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Siddhi Kale is a DFT Engineer at Ambarella Inc since July 2021, having previously served as a DFT & Design Intern at the same company from February to April 2021, where tasks included logic design to support DFT features and automation of the DFT flow. Prior experience includes a position as a Grader at Texas A&M University, responsible for designing assignment questions and grading for the 'ECEN248 - Introduction to Digital Systems Design' course, and an internship as an ASIC Engineer at Juniper Networks, focused on implementing physical design techniques for low power optimized ASICs. Siddhi Kale holds a Master's degree in Electrical Engineering from Texas A&M University and a Bachelor of Technology in Electronics and Communications Engineering from Visvesvaraya National Institute of Technology.