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Sanjay Chatterjee is a seasoned professional in the field of digital design and verification, currently serving as Manager at Allegro MicroSystems, LLC, after previously holding the title of Principal Engineer in ASIC Design/Verification. Sanjay has extensive experience, having worked as a Senior Engineer at Mentor Graphics Corp. and Viewlogic, as well as a Senior VLSI Design Engineer at IBM India. Early in the career, Sanjay was an Executive Engineer in the Switching R&D department at ITI Ltd. Sanjay Chatterjee earned a B.Eng. in Electrical Engineering from the National Institute of Technology Rourkela and pursued further education at the Isenberg School of Management, UMass Amherst from 2007 to 2009.