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Ken Farley

Senior FPGA Engineer Level 5 at Aeronix

Ken Farley is an accomplished Senior FPGA Engineer Level 5 at Aeronix since August 2022, specializing in FPGA, DSP, Embedded Linux, and C++. Prior experience includes over a decade at MacAulay-Brown, Inc. as a Principal Engineer responsible for digital signal processing algorithms in VHDL for Xilinx FPGAs and embedded Linux development. Farley's extensive background in embedded software engineering spans various roles at companies such as Leonardo DRS and DRS Technologies, focusing on embedded Linux kernels, driver development, and high-speed data storage software. Early career contributions include significant roles at Alidian Networks and Emerson Electric, as well as test engineering at General Dynamics. Ken Farley holds a Master’s Degree in Electrical Engineering with a focus on FPGA and DSP from Wright State University and a Bachelor’s Degree in Electrical Engineering from the University of Central Florida.

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