ÂÜÀòÂÒÂ×

Siddu Angadi is a Senior Silicon Design Engineer at AMD since October 2021, previously holding the position of Silicon Design Engineer 2 and specializing as a Design Verification Engineer. Prior experience includes serving as a Design Verification Engineer at Capgemini from July 2018 to October 2021, focusing on SoC verification. Siddu Angadi started career development as a Trainee in FPGA design and verification at Sandeepani School of VLSI Design from February 2018 to June 2018. Educational qualifications include a Bachelor of Engineering in Electronics and Communication from Dayananda Sagar College of Engineering, completed in 2017, and a Diploma in Electronics and Communication from Govt. Polytechnic Vijayapura, obtained in 2014.