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Dr. Nishi is a professor of electrical engineering and director of the Stanford Site of National Nanotechnology Infrastructure Network at Stanford University, where he is involved in the initiative for nanoscale materials and processes and for non-volatile memory technologies. Before joining the Stanford faculty in 2002, Dr. Nishi was the first Chief Scientist to be appointed at Texas Instruments. As a senior vice president there, Dr. Nishi directed research work for the Digital Signal Processing Solutions R&D Center, the Silicon Technology Development at Kilby Center, the Tsukuba R&D Center in Japan, and the Converter Product Development Center in New Jersey and Dallas. Prior to that, Dr. Nishi established and became director of Hewlett Packard’s new ULSI Research Laboratory, yand also served as director of the Silicon Process Laboratory and, later, the R&D Center for Integrated Circuits Business Division. Dr. Nishi started his professional career at Toshiba Corporation where he spent more than 20 years pioneering various semiconductor related research programs. His played a leadership role in developing innovations including the world’s first CMOS 1Mb dynamic, 256Kb CMOS static and 1Mb CMOS programmable memories. He has been credited as a technology leader who helped position Toshiba as one of the world’s a leading memory manufacturers. Dr. Nishi currently serves on a number of corporate boards of directors and advisory boards and committees for organizations including the Japan-America Society of Dallas/Fort Worth, Lawrence Livermore National Labs, SIA, , and industry associations including the SIA, SEMATECH and International SEMATECH, the Semiconductor Research Corporation, MARCO/DARPA’s Gigascale Silicon Research Center, the MARCO Interconnect Research Center, and NSF/SRC ERC for Environmentally Benign Semiconductor Manufacturing. Dr. Nishi holds a B.S. in metallurgy from Waseda University and a Ph.D. in electronics engineering from the University of Tokyo. Dr. Nishi has published approximately 75 papers in international technical journals and conferences and has co-authored nine books. He has been awarded more than 50 patents in the U.S. and Japan. He received IEEE Fellow Award (1987), 1995 IEEE Jack A. Morton Award for “Contributions to the basic understanding and innovative development of MOS device technology” and became the 2002 IEEE Robert Noyce Medal winner for “Strategic leadership in global semiconductor research and development”.